Integrated Circuits for CMUTs

For ultrasound imaging, the two primary motivations for integrating electronics with the transducer array are to preserve the quality of the received signal and to utilize large transducer arrays without dramatically increasing the overall system complexity and cost. For high frequency imaging and imaging with 2D arrays, the transducer elements are small. For reception, small elements produce a weaker signal and have higher equivalent impedance than larger elements. Because of these properties, having an amplifier closely associated with the element can dramatically improve signal-to-noise ratio. By incorporating beamforming functionality into integrated circuits, large area transducer arrays can be utilized without excessive external hardware. In current ultrasonic imaging systems, the array is in a hand-held probe connected to the main processing unit via a cable bundle. Transmit circuits and receive amplifiers are located in the main processing unit. Because of the small size and low capacitance of CMUT array elements in a 2D array, the electronics must be very close to the transducers, especially in catheter-based systems. This includes all transmit, receive, and multiplexing circuitry.

We have designed, fabricated and tested several ICs for integrated ultrasonic imaging systems using CMUT arrays. First-generation front-end transmit/receive circuits have been designed and implemented in a 0.25-µm standard CMOS technology. This circuitry can generate unipolar pulses to excite the transducer using “stacking” techniques to generate 5-V pulses in a process with a nominal supply voltage of 2.5 V. “Cascoding" or “stacking" is a commonly used technique in I/O circuits to achieve voltage signals, which could typically be twice as large as the nominal supply voltages without overstressing any of the transistors in the circuit. Our first prototype front-end IC includes a pulse driver employed as a transmitter circuit, a wide-band low-noise amplifier and a switch facilitating pulse-echo operation. Unipolar pulses have been chosen for simplicity. A transimpedance topology has been used to implement a low-noise, single-stage common-source amplifier as the preamp. An unsilicided polysilicon resistor was used for the feedback resistor. A high-voltage tolerant switch protects the input of the amplifier during the transmit cycle and conducts received echoes during the receive cycle.

Second-generation front-end circuits have been implemented in a high-voltage analog process. We have implemented a 16x16 2-D array of transmit-receive circuits with an architecture similar to that of the first generation. Additional control circuitry has been added to facilitate array operation. The pulse amplitude achievable with this circuit has been improved to 30 V. We have tested this circuit along with a 16x16 2-D CMUT array. The transducer and electronics arrays are integrated using flip-chip bonding. A die photo of this 2-D electronics array is shown in Fig. 1 along with an experimentally obtained signal diagram (Fig. 2). This diagram also includes the echo signal from a plane reflector. We have also used this 2-D CMUT array with integrated electronics to obtain 3-D synthetic aperture images. In addition to this 2-D array, we have also designed, fabricated, and tested a 16-channel 1-D array of high-frequency front-end circuits. In this design, the pulser output stage was scaled to drive transducers with narrow pulses, and the preamplifier bandwidth (50 MHz) was widened to be able to receive high-frequency echo signals. In this IC, all of the channels are simultaneously active. This circuit (Fig. 3) has been used in imaging experiments with forward-looking annular ring arrays and high-frequency linear arrays.

We have also designed and implemented an 8-channel, 20 MSa/s/channel, 10-bit analog-to-digital converter (ADC) in a 0.25-μm standard CMOS process. The experimental prototype occupies a 4 mm ² active silicon area while dissipating 20 mW of analog power per channel from a 2.5-V supply (Fig. 4). The testing of the prototype was successful and the results were reported in [1].

Currently, we are working on a new 16x16-channel frontend integrated circuit where 224 elements can be simultaneously fired in transmit and 16 elements can be used at a time for receive. In the proposed beamforming scheme, since there are 32 elements dedicated for receive on the 2D CMUT array, 2 firings per beam are required to utilize the 32-element receive aperture. The basic architecture for the IC implementing the proposed array design is shown in Fig. 5. A preamplifier is provided for each of the 32 receive elements. To interface to a 16-channel data acquisition system, 16 of the 32 receive elements are active at a time. Sixteen buffers drive the cable capacitance for the receive elements. A high-voltage pulser and an 8-bit shift register is provided for each of the 224 transmitting elements. The timing of each pulser is determined by delay information stored in the shift register. When transmitting, a particular pulser fires when a global counter equals the pulser’s stored delay value. For each new beam, delay information is loaded into the delay shift registers by 8 parallel lines. For reasonable data rates, the time required to store the delay information is a few microseconds. Thus, the frame rate is not significantly affected by the delay storage process. The layout of this IC is shown in Fig. 6.

 

 

FIGURE 1. 16x16 array of front-end integrated circuits.

 

 

 

 

FIGURE 2. Timing signals and the received echo.

 

 

 

 

FIGURE 3. 16-channel high-frequency high-voltage transmit/receive front-end integrated circuit.

 

 

 

 

FIGURE 4. 8-channel pipeline ADC.

 

 

 

 

FIGURE 5. Frontend architecture of FT-XR beamformer.

 

 

 

 

FIGURE 6. Layout of the circuit with frontend array and FT-XR beamformer.

 

 

 

References

 

[1] K. Kaviani, Ö. Oralkan, P. Khuri-Yakub, and B. A. Wooley, “A multichannel pipeline analog-to-digital converter for an integrated 3-D ultrasound imaging system,” IEEE J. Solid-State Circuits, vol. 38, no. 7, pp. 1266-70, Jul. 2003.

 

 

Acknowledgements

 

This project was funded by National Institutes of Health under grants CA99059 and HL67647. IC fabrication was provided by National Semiconductor Corporation.